MOSFET

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metal - oxide - semiconductor - field-effect transistors, referred to as half-effect transistor MOS (Metal-Oxide-Semiconductor Field-Effect Transistor, MOSFET) is widely used in analog circuits and digital circuits The field-effect transistor (field-effect transistor). MOSFET in accordance with its

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MOSFET MOSFET structure works related to the development of information and comparison of MOSFET and IGBT MOSFET architecture of Figure 1 is a typical planar N-channel enhancement-mode MOSFET outline. It uses a P-type silicon substrate with (Figure la), its surface diffusion of 2 N-type (Figure lb), and then covered in a floor of silicon dioxide (SiO ₂) insulation (Figure lc) Finally in the N region at the altitude with two holes made of corrosion-way, metal-based usage, respectively, and two holes on the insulating floor made of 3 electrodes: G (door), S (source) and D (drain), as shown in Figure 1d. Mechanical and Electrical Engineering, Suzhou Vocational-

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can be looked from Figure 1 the gate G and drain D and source S is insulated, D and S among the two PN junction. Under normal circumstances, the substrate and source interlocked attach internally. Figure 1 is N-channel enhancement-mode MOSFET elementary diagram. In mandate to cultivate the specifics of certain parameters, such as increasing the operating present and cultivate the operating voltage, dilute resistance and cultivate the switching specifics have another structure and process, constitute the so-called VMOS, DMOS, TMOS structure. Figure 2 is an N-channel enhancement-type power MOSFET in the process. Although there are assorted structures, merely it works the same, here is not presented. MOSFET works to make the enhanced N-channel MOSFET work in G, S is the voltage VGS between Canada and the D, S in between the assured voltage VDS, the resulting ahead current ID. VGS voltage can be controlled to alteration the current ID. Shown in Figure 3 (top ↑). If the first does not take VGS (namely is, VGS = 0), between the D and S plus a very positive voltage VDS, the drain D and the substrate between the PN coalition in reverse, it can not be conductive between drain and source. If the gate G and source S and a voltage between the VGS. At this point the gate and the substrate can be seen as two capacitor plates, when the oxide insulation layer as a capacitor dielectric. When paired with VGS, in the gate insulation layer on the interface and induces a positive charge, while in the insulating layer and the P-type substrate interface induces a negate dictate (Figure 3). This layer of negative charge and induction of P-type substrate in the majority of carriers (holes) of inverse polarity, so called connected together to fashion conductive outlet. When VGS voltage is too cheap, the sensor out of the negative charge less, it ambition be P-type substrate in the cavity and accordingly in this circumstance, still not current between the drain and source ID. When VGS reaches a decisive worth, the induction of negative charge into two divide places of N to manner N-channel communication, the threshold voltage is called the turn-on voltage (or threshold voltage, threshold voltage), with the character VT namely (common provisions in the ID = 10uA when VGS as VT). When VGS continues to boost, the negative charge increases, the conduction outlet expansion, resistance is lowered, ID also increases, and showed a agreeable linear relationship, shown in Figure 4. This curve is called the conversion function. Therefore, among a certain range can be considered to alteration the VGS to control the resistance between drain and source, to control the ID of the character. Mechanical and Electrical Engineering, Suzhou Vocational-

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Because of this structure in the VGS = 0 时, ID = 0, called the MOSFET is enhanced. The other MOSFET, VGS = 0 when in a certain ID (called IDSS), such as depletion-mode MOSFET. Its structure is shown in Figure 5, it's convey characteristics shown in Figure 6. VP because the pinch-off voltage (ID = 0). Depleted and enhanced the cardinal distinction is in the industry of SiO2 insulation layer in a massive digit of positive ions, so that the interface in the P-type substrate induces extra negative charge, ie two N-type region in the middle of the P-type silicon N-type silicon to form a svelte layer to form a conductive channel, so VGS = 0, there is the role of VDS is also a certain ID (IDSS); When VGS is a voltage (either positive voltage or negative voltage), changing the sensor The amount of negative charge, thus changing the ID size. VP as ID = 0 time-VGS, understood as the pinch-off voltage. Details and associated development from the perspective of the MOSFET current label, in truth, will make folk obtain the wrong impression. Because the MOSFET in benefit of Early MOSFET gate (gate electrode) the use of metal as its substance, but with advances in semiconductor technology, modern MOSFET gate has long been replaced with silicon metal. MOSFET in the concept are Some people have mentioned the polysilicon gate field-effect transistor components prefer to use IGFET, but maximum refer to these IGFET MOSFET. MOSFET in the oxide layer at the top of its channel, in accordance with its operating voltage is different, this layer of oxide thickness of only tens to hundreds of angstroms (Å) and is routinely matter is silica (silicon dioxide, SiO2 ), but some fashionable progressive process is already accessible, such as silicon oxynitride (silicon oxynitride, SiON) as the oxide use. Today's semiconductor material is usually silicon (silicon) is favored, but also some semiconductor companies to amplify the use of other semiconductor materials, processes, amid the maximum noted sample, IBM uses silicon and germanium (germanium) blend of the development of silicon germanium process ( silicon-germanium process, SiGe process). And unfortunately many have good electrical properties of semiconductor materials, such as gallium arsenide (gallium arsenide, GaAs), for quality can not be good enough to grow on the surface oxide layer, it can not be accustom to make MOSFET devices. When a great enough potential inconsistency applied to the MOSFET gate and source (source) between when the cordless field at the base of the semiconductor oxide layer formed on the surface elicited charge, and when the so-called will form. Channel's polarity and its drain (drain) and the same source, assuming that the drain and source are n-type, then the channel will be n-type. Channel formation, MOSFET allows current to pass,9445.org, along to the voltage applied to gate different, may be flowing through the MOSFET channel will be controlled at the current size of the change. Circuit symbols accustomed in the MOSFET circuit symbols There are many changes, the most prevalent design is based on a straight line on behalf of channel, and channel two perpendicular lines indicate the source and drain, and the left channel and a shorter collateral lines characterize the grid pole, as shown underneath. Sometimes the line will represent the channel to replace the broken line to differentiate between enhanced MOSFET (extension mode MOSFET) or a depletion mode MOSFET (exhaustion mode MOSFET). As the integrated circle piece MOSFET for the four-terminal devices, so in increase to gate, source, drain, there are a pedestal (Bulk or Body). MOSFET circuit symbols, from the right channel enhancement direction of the signal can be said that this factor is n-type or p-type of MOSFET. P-side way of the arrow forever points from the N-terminal, so the directional points to the base from utmost channel for p-type of MOSFET, or referred to as PMOS (on benefit of this makeup of the channel for the p-type); the other hand whether the arrow pointing from the base channel, the on behalf of the base is extremely p-type, and channel for the n-type, this makeup of the n-type MOSFET, referred to as NMOS. Distributed MOSFET devices in general (discrete appliance), usually the base and source connected together, so the MOSFET is typically dispensed three-terminal devices. In the integrated circuit in the MOSFET is usually due to using the same base (common bulk), so I do not mark the base of polarity, but more extreme in the PMOS gate in a circle to show the inconsistency. MOSFET MOSFET's core operating principle: metal - oxide - semiconductor capacitors metal - oxide - semiconductor structure with a MOSFET in the structure of metal - oxide - semiconductor capacitors for the essence (as said earlier, most of today's MOSFET with polysilicon as gate material instead of metal), oxide material is mostly silica, as a base beneath the silicon, and on it is as the gate polysilicon. The structure like this is accurate equal to a capacitor (capacitor), the oxide layer activities a capacitor dielectric quality (dielectric material) role, and capacitance values ​​from the oxide layer thickness and dielectric constant of silicon dioxide (dielectric constant) to decide. Gate polysilicon and the silicon base of the MOS capacitor is a two endpoints. When a voltage is applied cross the MOS capacitor, the semiconductor charge distribution will also change. Consider a p-type semiconductor (hole concentration of NA) to form the MOS capacitor, when a positive voltage is applied to the gate and the base VGB extreme (pictured), the hole concentration is reduced, the electron density will increase . When VGB muscular enough, the electron concentration approach the gate more than the extreme hole. The p-type semiconductors in the electronic concentration (negatively charged) than holes (positively charged) concentration region, the so-called inversion layer (inversion layer). Determine the characteristics of MOS capacitor operating characteristics of the MOSFET, but a complete MOSFET structure also need to cater a majority carrier (majority carrier) of the source and the carrier to accept a cloud of the drain. MOSFET structure of an NMOS transistor is a three-dimensional cross-section left n-type MOSFET (hereinafter referred to as NMOS) of the segments. As mentioned earlier, MOSFET's is located in the chief essence of the MOS capacitor, while the left and right is its source and drain. Characteristics of the source and drain have to be the same as the n-type (ie NMOS) or the same as the p-type (ie PMOS). Right NMOS source and drain apparent on Between the source and drain regions are separated by a polar opposite, understood as the base (or substrate) region. If NMOS, then the matrix region is doped p-type. Instead of the PMOS, the substrate is n-type, and source and drain was p-type (and is heavily doped P +). Substrate doping concentration does not require as source or drain is so lofty, it is not in the right On the NMOS, the really accustom as a channel, so that the carrier only by the MOS capacitor is underneath the semiconductor surface area. When a positive voltage applied to the gate, the negatively charged electrons are fascinated to the surface to form a channel, so that n-type semiconductors the majority carriers - electrons can flow from the source drain. If the voltage is cleared, or put a negative voltage, then the channel can not be formed, the carrier can not flow between the source and drain. Assuming the action object into PMOS, then the source and drain highly p-type, the phalanx is ​​the n-type. In the PMOS gate negative voltage is applied, the semiconductor the hole will be attracted to the surface channel, the semiconductor majority carriers - holes can flow from the source drain. Assuming that this negative voltage is removed, or with a positive voltage, then the channel can not be formed, the same can not let carriers between the source and drain flow. Specifically, the source of the MOSFET in the meaning is For NMOS, the majority carriers are electrons; for PMOS, the majority carriers are holes. In contrast, the drain is to receive the majority of carriers of the endpoint. The operating mode NMOS MOSFET drain current and drain voltage difference between VGS - Vth MOSFET linear relationship between the operation of the cross-section area MOSFET operating in the saturated region in accordance with sections in MOSFET's gate, source and drain imposed by the very end of three region) when the gate to source voltage VGS (G on behalf of the gate, S fjust abouturce) is less than a known threshold voltage (threshold voltage, Vth) value, the MOSFET is in the -off) state, current can flow via the MOSFET, the MOSFET is not turned on. But in truth when the MOSFET VGS in some countries with large integrated circuit products, such as DRAM, sub-clinical threshold current tends to reason additional energy or power consumption. Triode or linear region (triode or linear region) when VGS> Vth, and VDS [edit] MOSFET applications in the electronic circuit on the advantages of MOSFET in 1960 by Bell Labs (Bell Lab.) Of D. Kahng and Martin Atalla the first successful implementation of this component of the operating principles and Clay Shaw in 1947 (William Shockley), who contrived the bipolar transistor (Bipolar Junction Transistor, BJT) very different, and for the fabrication price and use of smaller, the advantages of highly integrated, large-scale integrated circuit in (Large-Scale Integrated Circuits, LSI) or VLSI (Very Large-Scale Integrated Circuits, VLSI) of the field, the importance of far more than BJT. In recent annuals, deserving to MOSFET device representation gradually improved, in increase to traditional applications such as microprocessors, microcontrollers, digital semaphore processing applications, there are also speed up analog signal processing integrated circuits MOSFET can be used to fulfill the following These applications were introduced. Digital circuit digital technology advances, such as microprocessors continue to improve operational efficiency, send more in-depth development of new generation power MOSFET, which also makes the operation of MOSFET itself faster and faster, approximately agreeable the most spirited components of manifold semiconductor fast 1. MOSFET digital signal processing in the cardinal success of the invention from a CMOS logic circuit, the biggest vantage of this structure is theoretically not static power loss, only the logic gate (logic gate) of switching current deed only when through. Basic CMOS logic gate CMOS inverter members (inverter), and always the basic operation of CMOS logic gates are the same as the inverter, the same time will only one transistor (NMOS or PMOS) in the conduction of state, another state must be cut-off, which makes power-to-ground from the customer does not have a straight conduction path to substantial savings in current or power expense, but also reduces the integrated circuit heat. MOSFET in a digital circuit applications, different avail is the direct current (DC) signal is concerned, MOSFET gate impedance is infinite extreme (equivalent to open circuit), that is, in methodology, there will be no current flow from the MOSFET gate extreme circuit in the ground, but entirely in the form of a voltage-controlled gate. This allows the MOSFET and BJT than their main competitors beneath more power, but also easier to drive. In CMOS logic circuits, in counting to the chip responsible for driving the external load (off-chip load) drive (driver), each level of logic gates are the same at the peak of the face is the gate of the MOSFET, this way no more logical to consider the driving compel of the door itself. In contrast, BJT logic circuits (case in point, the most common TTL) will not have these advantages. MOSFET's gate input resistance infinite for circuit devise engineers, there are other advantages, such as logic gates than without considering the load on the output achieve (loading effect). Analog circuit fhardly everme time, MOSFET analog circuit design engineer is not the first choice, because the analog circuit design accent on performance parameters, such as transistors transduction (transconductance), or the driving compel on current, MOSFET BJT is more appropriate than analog circuitry. But with MOSFET technology continues to evolve today's CMOS technology has also been skillful to encounter the needs of many analog circuit specifications. Coupled MOSFET because of the structure of relationships, not BJT some pernicious disadvantages, such as heat mar (thermal runaway). In addition, MOSFET linear region of voltage-controlled resistance characteristics of the integrated circuit can also be used to replace the traditional polysilicon resistors (poly resistor), or a MOS capacitor itself can be used to replace the usually used silicon - insulator - silicon capacitors (PIP capacitor ), even in the proper circuit can be expressed beneath the control of the inductor (inductor) features, these benefits are tough to provide the BJT. In other words, MOSFET transistors in addition to playing the role of the original, but also can be used as a large digit of analog circuits using passive components (passive device). This has the advantage to the use of MOSFET for analog circuit not only encounter the specifications of the claim, but also can mainly reduce the chip area, lower product costs. As semiconductor manufacturing technology, for integrating more functions onto a single chip according with the demand increased dramatically, this time with MOSFET analog circuit design is another advantage also will emerge. In order to reduce the published circuit embark (Printed Circuit Board, PCB) on the number of integrated circuits used to reduce packaging costs and reduce the size of the system, many of the elemental stand-alone analog chips and digital chips are integrated into a single chip. MOSFET originally in digital integrated circuits have a excellent competitive advantage in the analog integrated circuit is also extensive use of MOSFET, the different functions of these two circuits is also the difficulty of integrating a meaningful ebb. Others, like some of the mixed-signal circuits (Mixed-signal circuits), such as analog / digital converter (Analog-to-Digital Converter, ADC), but also to take advantage of MOSFET technology to design better products performance. In recent years, there is an integrated MOSFET and BJT relative values of process technology: BiCMOS (Bipolar-CMOS) are increasingly renowned. BJT element in the ability to drive high current than the CMOS is still peerless in stability also has some advantages, for instance, is not easy, Therefore, many also absence to re-noise signal processing and a lusty current drive capacity of the integrated circuit products using the BiCMOS technology to making. MOSFET scaling the size of the elapse few decades, MOSFET continuously smaller size. Early IC MOSFET process, the channel width of approximately a few microns (micrometer) level. But in today's integrated circuit manufacturing process, this parameter has been reduced several times even more than a hundred times. In early 2006, Intel began to 65nm (nanometer) technology to create a new generation of microprocessors, the actual device channel width may be smaller than this figure. To the late 1990s, MOSFET size is shrinking, so that the performance of integrated circuits greatly enhanced, but from a historical perspective, these technological breakthroughs and advances in the semiconductor manufacturing process has a near relationship. Why ought reduce the size of the MOSFET based on the retinue reasons, we wish the MOSFET size to as small as possible. First, the smaller the channel length of MOSFET symbol of its decline to the equivalent channel resistance also decreased, allowing more current through. Although the channel breadth may also be emulated by smaller equivalent resistance and let the channel transform larger, but whether you can reduce the size of element resistance, then the problem can be decided. Second, MOSFET's smaller size means that the gate area is reduced, so you can reduce the equivalent gate capacitance. In addition, the smaller the gate usually have thinner gate oxide, which allows the channel element of the previously mentioned resistance value decreased. But such a change and reserve the gate capacitance but became larger, but the channel resistance and reduced likened to the gains still more than damage, while reduced in size after the MOSFET switching speed because of the upon two elements will Total and faster. The third cause is the smaller area of ​​the MOSFET, the spend of manufacturing the chip can be reduced, in the same package where you can clutch a higher density chips. An integrated circuit layer manufacturing process using a fixed size, so if the smaller chip area, the same size of the wafer can produce more chips, so the spend becomes even lower. Although the MOSFET size reduction can bring many benefits, but also a lot of negative effects have followed. Reduce the size of the MOSFET difficulties after the MOSFET measurements shorten to one-micron manufacturing process for semiconductors is a challenge, but now most of the new challenges from ever-smaller MOSFET devices caused by physical effects not seen in the past . Pro restrict conduction times as MOSFET gate oxide thickness is also decreasing, so the maximum gate voltage also will become less, so as not to reason too many voltage gate oxide breakdown (malfunction). In order to preserve the same performance, MOSFET's threshold voltage must be reduced, but it also led to speed up tough to completely rotate off the MOSFET. In other words, enough to cause the MOSFET channel happened weak inversion gate voltage will be lower than before, so-called sub-clinical threshold current (subthreshold current) problems caused by more solemn than in the past, primarily in today's integrated circuits chip, the increasing number of transistors contained in some of VLSI chips, sub-clinical displacement restrict due to power consumption really accounted for more than half of the aggregate power consumption. But conversely, some circuit design because of the MOSFET conduction sub-clinical behalf limits, such as requiring a higher transduction / current conversion percentage (transconductance-to-current ratio) of the circuit, restrict the use of sub-clinical MOSFET conduction to achieve the purpose of design is quite common. Chip interconnect wire parasitic capacitance effects Traditionally, CMOS logic gate switching speed and its components on the gate capacitance. But when the MOSFET gate capacitance with the smaller size is reduced, the same size can hold more transistors on a chip, the connection between these transistors produce metal wire parasitic capacitance effects began to prevail the logic gate switching speed. How to reduce the parasitic capacitance, the chip efficiency can wreck up into 1 of the keys. Chip heat increase when the number of transistors on a chip increased dramatically, there is an unavoidable problem ensued, and that is the chip's heat has increased significantly. General integrated circuit components operating at high temperatures may outcome in switching speed be affected, or outcome in reliability and life issues. Heat is very high in some integrated circuit chips such as microprocessors, immediately need to use increased cooling systems to alleviate this problem. In the power transistor (Power MOSFET) in the field, the channel resistance is often increased because of mushroom in temperature followed, so that also makes the components in pn-junction (pn-junction) due to power wastage increases. Suppose an external cooling system can not reserve the power transistor temperature low enough levels, is probable to make these power transistors have been heat damage (thermal runaway) destiny. Gate oxide leakage current increases with the MOSFET gate oxide becomes smaller and thinner size, the current mainstream semiconductor manufacturing process, even to make a thickness of only 1.2 nm gate oxide layer, nearly equal to 5 atomic the thickness of stacked it. In this scale, entire the physical phenomena in quantum mechanics within the norms of the globe, such as electron tunneling efficacy (tunneling effect). Because the tunneling effect, and some have the opportunity to e-oxide layer formed over the latent energy barrier (potential barrier) and the resulting leakage current, which is today's integrated circuit chip, a source of power. To solve this problem, some higher dielectric constant than silicon dioxide gate oxide material is used in the layer. For instance, hafnium (Hafnium) and zirconium (Zirconium) metal oxide (hafnium dioxide, zirconium dioxide) high dielectric constant material can mainly reduce the gate leakage current. Gate oxide dielectric constant increases, the thickness of the gate can increase the size while maintaining the same capacitance. The thicker gate oxide layer can also reduce the effect of electron tunneling through the oxide layer by the probability, thereby reducing leakage current. However, the use of new materials of gate oxide must also consider the potential energy barrier altitude, because these new materials the conduction band (conduction band) and the valence band (valence band) and the semiconductor conduction band and valence band gap than two small silica (silicon dioxide and silicon conduction band is about the altitude difference between 8ev), it still may guide to gate leakage current appears. More difficult to control process variation of modern semiconductor processes are numerous and perplexing process, any process may have resulted in an integrated circuit chip components to slight variation. When the MOSFET and other components getting smaller and smaller proportion of these variations may significantly increase, thereby affecting the performance of the circuit designer proposed, this variation allows the circuit designer's work has become more difficult. MOSFET gate MOSFET's gate material should be possible in theory, prefer a good electrical conductor, through the heavily doped polysilicon in the conductivity can be used after the gate of the MOSFET, but not the perfect choice. The current MOSFET with polysilicon as the following reasons: 1. MOSFET's threshold voltage (threshold voltage) and the main channel by the gate material work function (work function) to resolve the difference between, and because silicon is essentially a semiconductor, it can different polarity by impurity doping to change its work feature. More importantly, because the base polysilicon and silicon as the channel between the energy gap (bandgap) the same, thus reducing the PMOS or NMOS threshold voltage can be adjusted instantly by the work function of polysilicon to achieve requirements. Conversely, metal work function is not so effortless to change as semiconductors, this course to reduce the MOSFET's threshold voltage becomes more difficult. And if you absence to reduce the threshold voltage PMOS and NMOS, will need two different metals were doing their gate material for the process is a huge variable. 2 silicon - silica junction after years of research have confirmed that the failing between the two materials (failing) is relatively small. On the opposed, the metal - insulator junction defects more accessible in the formation of many surface energy between the two bands, greatly affect the device characteristics. 3. Polysilicon melting point higher than most metals, and in modern semiconductor manufacturing processes used in high temperature deposition of gate material to improve device performance. Low blend point metal, the process will influence the maximum temperature that can be used. However, although the polysilicon in the past two decades is to build a standard MOSFET gate, but there are still some failings make the future possible use of metal gate MOSFET portion, these shortcomings are as with: 1. Polysilicon conductive than metal, limiting the signal displacement speed. Although you can use to improve their course of doping the conductivity, but the effect is still limited. At present, some relatively high blend point metal material such as: W (Tungsten), Ti (Titanium), Cobalt (Cobalt) or Ni (Nickel) is used to made of alloy and polysilicon. Such hybrid materials commonly referred to as metal silicide (silicide). With a polysilicon gate metal silicide has a relatively good electrical properties, and also can withstand high temperature process. In addition, because the metal silicide gate situation in the surface, distant away from the channel area, so the threshold voltage of the MOSFET will not have much shock. At the gate, source and drain are plated with metal silicide process called 2 When the MOSFET size reduction is very small, the gate oxide becomes very slender, case in point, the present process can be reduced to the oxide layer thickness of about one nanometer, a phenomenon not found in the past also will produce, This phenomenon is known as When the MOSFET inversion layer formation, there is the phenomenon of polysilicon exhaustion MOSFET gate oxide at the polysilicon close, there will be a depletion layer (depletion layer), affect the characteristics of MOSFET on. To solve this problem, the metal gate is the best discretion. Currently feasible materials include tantalum (Tantalum), tungsten, tantalum nitride (Tantalum Nitride), or titanium nitride (Titalium Nitride). These are usually metal gate and high dielectric constant material to form the oxide layer together constitute the MOS capacitor. Another solution is to complete the alloying silicon, known as FUSI (FUlly-SIlicide polysilicon gate) process. A diversity of common twice gate MOSFET technology, dual-gate MOSFET (dual-gate) MOSFET is usually used in the RF (Radio Frequency, RF) integrated circuit, the gate of this MOSFET can control the two current size. In RF applications, the twice gate MOSFET gate of the second most used for gain, mixer or frequency converter control. Depletion-type MOSFET in general, depletion-type (depletion mode) MOSFET than the strengthening of the aforementioned type (enhancement mode) MOSFET infrequent. Depletion-type MOSFET in the manufacturing process to change the channel impurity doping concentration, makes this even without the MOSFET gate voltage increases, the channel still exists. If you want to close the channel, you must apply a negative gate voltage. Depletion-type MOSFET's biggest application is in the NMOS logic is usually the same drive capability of the NMOS PMOS than the area occupied by small, so if I were you the design of the gate, then use the NMOS can reduce chip area. However, however the total area of ​​NMOS logic is small, but not the same as the CMOS logic do not expend static power, so in the mid-1980s, has gradually withdrawn from the mart. Power MOSFET power transistor unit sections. Typically a commercially available power transistors embody thousands of such units. Main article: Power MOSFET power transistors and MOSFET devices in the structure described above has on the meaningful differences. Generally in the MOSFET integrated circuits are planar (planar) structure, the transistor chip surface from each end are only a few microns distance. All power components are vertical (vertical) structure, so that components can withstand high voltage and high current work environment. A power MOSFET can withstand the voltage and impurity doping concentration n-type epitaxial layer (epitaxial layer) thickness is a function of the current through the channel breadth and components are associated to the wider channel is able to accommodate more current. For a planar structure of the MOSFET, the current and can withstand the sum of voltage breakdown and its channel length and width are related to the size. On the vertical structure of the MOSFET, the device can hold the area and its current into around proportional to the thickness of the epitaxial layer and its breakdown voltage. It is worth mentioning is the use of planar structure of the power MOSFET is not there, these components primarily used in advanced audio amplifier. Planar power MOSFET in the saturation characteristics better than the vertical structure of the competitor. Vertical power MOSFET switch is mostly used for purposes, any is resistance (turn-on resistance) is very small advantage. DMOS DMOS is a double diffusion MOSFET (double-Diffused MOSFET) acronym, which is effectively used for high pressure, are areas of high-voltage MOS tube. MOSFET analog alternate MOSFET to achieve the turn-on channel resistance is low, and the deadline nearly infinite resistance, so suitable as an analog signal alternate (signal energy will not switch too many detriment of resistance). MOSFET as a switch, the source and drain, respectively,0332.org, and other applications are not the same, because the signal from the appearance either end of the MOSFET gate and out. Of the NMOS switch, the voltage is the most negative end of the source, PMOS is fair the opposite, the most positive voltage source at one end. MOSFET switch can transfer the signal will be the gate - source, gate - drain and drain to source voltage limit, if more than the voltage of the MOSFET crown may lead to scalding. MOSFET switches wide range of applications covered the need to use the sample hold circuit (sample-and-hold circuits) or a chopper circuit (chopper circuits) design, such as analog to digital converter (A / D converter) or switch capacitor percolate (switch-capacitor filter) MOSFET switch can be seen on the track. Single MOSFET switch when the NMOS switch is used to do, its base grounded, the gate control switch for the endpoint. When the gate voltage minus source voltage exceeds its turn-on threshold voltage, the switch state of conduction. Gate voltage continues to rise, the greater the current through the NMOS. NMOS switch operation make the linear region, because the source and drain voltage when the switch will tend to turn the same. PMOS switch to do, its base connected to the circuit where the highest potential, usually power. Very low gate voltage than the source, exceeds the threshold voltage, PMOS switch opens. NMOS switch can allow the voltage through the ceiling (Vgate-Vthn), while the PMOS switch was (Vgate + Vthp), this value is usually not the elemental signal voltage expanse, so that a unattached MOSFET switch the signal amplitude will be smaller, The drawback of signal perversion. Dual MOSFET (CMOS) switches a single MOSFET switch in order to improve the aforementioned disadvantages caused by signal distortion, so the use of a PMOS with an NMOS CMOS switches to become the most common train. CMOS switch PMOS and NMOS source and drain are connected together, and the base of the access rules and NMOS and PMOS connected in the same tradition. When the input voltage (VDD-Vthn) and (VSS + Vthp) when, PMOS and NMOS are turned on, the input is less than (VSS + Vthp), only the NMOS conduction, the input is greater than (VDD-Vthn) only when PMOS conduction. This has the advantage in most of the input voltage, PMOS and NMOS are simultaneously conducting, if either side of the resistance increase, the other side of the resistance will drop, so the switch can be kept virtually constant resistance reduce the signal distortion. Comparison of MOSFET and IGBT power field effect transistors MOSFET full name. Its three great source, respectively (S), drain (D) and gate (G). Main advantages: thermal stability, security, large work area. Disadvantages: low breakdown voltage, current small. Full name of insulated gate bipolar transistors IGBT, MOSFET and is the GTR (power crystal tube) product of the combination. Its three most are collector (C), emitter (E) and gate (G). Features: breakdown voltage up to 1200V, the maximum collector saturation current over 1500A. By the IGBT inverter as inverter devices on 250kVA capacity, operating frequency up to 20kHz.